Just for clarification, to make sure I spotted the correct error and figure out the best way to correct it.
I designed a board that works fine on the Pi but causes the S905X-CC to not boot at all. It makes use of pins 13 and 15 as inputs on the 7J1 header and holds them ‘low’ most of the time (one for interrupt input, one for PPS signal).
From the header reference spreadsheet, I just realized that pin 15, or GPIO10, should only be used as output and will hold the system in a reset state when held low.
I know I will have to re-route the trace going to GPIO 10 to use a different GPIO line. The closest and easiest ones would be GPIOs 93 or 94 (pins 16 & 18) but those are likely reserved as CTS/RTS if UARTA is active.
Are there any issues in using GPIO 9, in which case I would have to re-route it as well, or would that one be ok to leave as-is?
Also, would there be an option flag available with the S905X UARTA overlay, or a ‘no handshaking’ version of the overlay to only enable and map the TX and RX lines and leave the CTS/RTS ones free to use as GPIO?