IRQ GPIO / pps-gpio on LaFrite S805X

Hi all,

I’m running a Debian Bookworm downloaded from the Libretech hub, with the rolling kernel, and would like to set up pps-gpio on one of the GPIO pins of the LaFrite board (AML-S805X-AC).

Cabling:

GPS     7J1 Pin 
Vcc ----- 4, 5volts
Gnd ----- 6, Ground
Tx  ----- 8, UART_TX_A
Rx  ----- 10, UART_RX_A
PPS ----- 11, GPIOAO_8

Kernel is the following - which does have the gpio irq patches added:

6.6.31-00070-gb1edc9b0c128

When pps-gpio is loaded, it does register the gpio as IRQ, and then sets up pps-gpio:

[  479.589334] gpio irq setup: hwirq: 0x8 irqfirst: 0x0 irqlast: 0x9 pin[8]
[  479.594186] pps pps0: new PPS source pps-gpio.-1
[  479.598368] pps pps0: Registered IRQ 48 as PPS source
# cat /sys/kernel/debug/gpio |grep pps-gpio
 gpio-520 (HDMI CEC            |pps-gpio            ) in  hi

As on 6.6 the gpiochip numbering is different to the earlier kernels, gpio-520 still seems to be the correct one.

# ls -l /sys/class/gpio/
total 0
--w------- 1 root root 4096 Jun  4 23:06 export
lrwxrwxrwx 1 root root    0 Jan  1  1970 gpiochip512 -> ../../devices/platform/soc/c8100000.bus/c8100000.bus:pinctrl@14/gpio/gpiochip512
lrwxrwxrwx 1 root root    0 Jan  1  1970 gpiochip523 -> ../../devices/platform/soc/c8834000.bus/c8834000.bus:pinctrl@4b0/gpio/gpiochip523
--w------- 1 root root 4096 Jun  4 23:06 unexport

Still, attaching the PPS pin to 7J11 doesn’t seem to kick in any interrupts:

# ppstest /dev/pps0
trying PPS source "/dev/pps0"
found PPS source "/dev/pps0"
ok, found 1 source(s), now start fetching data...
time_pps_fetch() error -1 (Connection timed out)
time_pps_fetch() error -1 (Connection timed out)

Checking with gpiomon, the result is the same - no state changes appear:

# gpiomon gpiochip0 8

(console log shows a similar "gpio irq setup" as when the pps-gpio module is loaded)

# cat /sys/kernel/debug/gpio |grep gpiomon
 gpio-520 (HDMI CEC            |gpiomon             ) in  hi

The DTS overlay I’m using is the following:

/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/meson-gxl-gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/amlogic,meson-gxl-gpio-intc.h>

/ {
        compatible = "libretech,aml-s805x-cc", "amlogic,s805x", "amlogic,meson-gxl";

        fragment@0 {
                target-path = "/";
                __overlay__ {
                        pps_gpio: pps-gpio {
                                compatible = "pps-gpio";
                                pinctrl-names = "default";
                                pinctrl-o = <&ao_cec_pins>;
                                gpios = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
                                interrupt-parent = <&gpio_intc>;
                                interrupts = <IRQID_GPIOAO_8 IRQ_TYPE_EDGE_RISING>;
                                assert-rising-edge;
                                status = "okay";
                        };
                };
        };
};

Based on the gpiomap, I’m using the correct GPIO pin and the correct GPIOAO interrupt. A similar setup with the same GPS module (u-blox 7) does work on another board, along with the PPS kicks. What could I be doing wrong?

Thanks,
-w-

I was just looking for PPS for the Frite, so thank you. Have you gotten this working? The only thing I see from a quick look is that header pin 11 “Requires 9J3 jumper to be positioned to pass GPIOAO_8 to 40 pin header”, and I didn’t see any mention that you had that setup.

This is only mentioned in a confusing footnote on the Headers spreadsheet, and FWIW the Frite I got had NO jumper on 9J3.

UPDATE: after dicking around to get the fragment to compile (where did you get the amlogic,meson-gxl-gpio-intc.h from - it’s not in the ltc-headers package?), pps0 is up and ticking. I’m connecting to the center pin of 9J3, not the big header. I know I have dozens of those once ubiquitous little buggers around here, but I’m not sure where they got filed now that motherboards and peripherals that use them have all but vanished…