I tried several different pins too. I can confirm that GPAIOAO_9 and GPIOAO_6 give the same error. I think the problem has something to do with how this Amlogic chip handles mapping interrupts to GPIO. I tried several different approaches with interrupts in the .dts too, but no success. Hopefully someone from libre will chime in with an example that works.
Which .dts examples should I be looking at for pps-gpio on s905x? I have looked at the overlays here:
But there aren’t any pps examples. I realize now my pps { line should probably be pps@0 { but that didn’t work either. Any suggestion of an example would be appreciated.
Has there been any progress made here? One of the best use cases for these ARM single board computers is to deploy them with a GNSS receiver to create a small and cost effective network time server - but PPS is absolutely required.
Does Libre Computer offer any sort of bug bounty program? I know that I would gladly contribute to having this issue be resolved…
An NTP server with PPS discipline is something I’m very interested in as well. Per some of the other posts and suggestions I’ve run the command dtc -I dtb -O dts pps-gpio.dtbo -o pps-gpio.dts on the raspberry pi device tree overlay located in /boot/overlays on the le potatoe current raspbian I’ve got on my board. This is the output, I’m not sure how to translate this -
One thing I’m considering at this point is applying the dt overlay that makes uarta include RTS and CTS. Then feeding the pps into CTS. The old school way of making an NTP server applied the PPS to the DCD of the UART. This would require using gpsd to interface between the gps and ntp/chrony. The ppscheck utility included with gpsd indicates will sense pps applied to a UART CTS, so hopefully gpsd would as well. It really all boils down to getting the pps pulse to generate an interrupt somehow.
No sucess yet. I’ve added the uarta cts-rts dt overlay (sudo ldto merge uart-a-rts-cts). The GT-U7 listed above is connected -
Potatoe ----- GPS
pin 4 5v — gps v in
pin 6 gnd — gps gnd
pin 8 uarta tx — gps rx
pin10 uarta rx — gps tx
pin12 uarta cts — gps pps (100 ms pulse at start of each second)
The gpsd daemon is started (sudo gpsd -D 5 -N -n /dev/ttyAML6). gpsd connects via uarta and controls and configures the gps device. However the pps is not received via uarta cts.
gpsd messages --------
gpsd:INFO: gpsd_activate(2): activated GPS (fd 5)
gpsd:PROG: NTP:PPS: using SHM(0)
gpsd:PROG: NTP:PPS: using SHM(1)
gpsd:PROG: PPS:/dev/ttyAML6 chrony socket /run/chrony.ttyAML6.sock doesn’t exist
gpsd:PROG: KPPS:/dev/ttyAML6 checking /sys/devices/virtual/pps/pps0/path, /dev/ttyAML6
gpsd:INFO: KPPS:/dev/ttyAML6 RFC2783 path:/dev/pps0, fd is 6
gpsd:INFO: KPPS:/dev/ttyAML6 pps_caps 0x1133
gpsd:INFO: KPPS:/dev/ttyAML6 have PPS_CANWAIT
gpsd:INFO: KPPS:/dev/ttyAML6 kernel PPS will be used
gpsd:PROG: PPS:/dev/ttyAML6 thread launched
gpsd:INFO: PPS: activated /dev/ttyAML6 ntpshm_link_activate(): Clock
gpsd:INFO: KPPS:/dev/ttyAML6 kernel PPS timeout unknown error
gpsd:INFO: KPPS:/dev/ttyAML6 kernel PPS timeout unknown error
gpsd:INFO: KPPS:/dev/ttyAML6 kernel PPS timeout unknown error
gpsd:INFO: running with effective group ID 20
gpsd:INFO: running with effective user ID 115
pps is still not received by gpsd. Don’t know why. I’ve modded the python gpio getter script to sample 20 times a second for 5 seconds. (sudo python3 mygpioget.py 1 93) chip1-93 is the cts pin 12. You can see the 100 ms pulses are there, -
Gpsd does receive the serial messages from the gps on uarta and can generate the time, but no pps. Gpsd monitors RI, CD and CTS for pulses, not sure why there is a disconnect.
So that is it, I’ve used “sudo stty -F /dev/ttyAML6 crtscts” to turn on hardware flow control for the uart as well but no joy.
So I’m back to looking to enable a gpio pin with an interrupt to setup a pps-gpio device at /dev/pps0. Going to look at the existing overlays for a pin with an interrupt and try temp merging them to see if the pps pulses generate the interrups required on the pin.
It clearly indicates the problem. You have to specify the interrupt explicitly in the device tree overlay. You cannot assume the platform can figure out which IRQ it is based on the GPIO as this platform has no gpio_to_irq function. There are other overlays with interrupts and you can copy them verbatim as long as the interrupt controller is correct and the interrupt line number is correct.
At this point think I can say pps-gpio is not compatible with a le potato. If you need a precision ntp server with pps discipline you will need to find another soc.
Just took a look at the pps-gpio driver. It uses the gpiod_to_irq function exclusively and does not look for interrupts. As this platform does not have a gpiod_to_irq function, it’s unable to grab the right interrupt.
This will require a kernel patch to add feeding the interrupt directly to the driver instead of the driver failing to map a GPIO to interrupt. We have added this to our engineering task list.
Thank you! I’ve updated with the modded kernel and applied the overlay and am getting the time pulses recognized.
One issue with the overlay, think … IRQ_TYPE_EDGE_FALLING>;
assert-falling-edge; …
both FALLING/falling should be RISING/rising as the rising edge of the time pulse corresponds to the start of the second. That is the only change I’ve made. Need to do more testing and get the Chrony configuration sorted for the best operation. Hope to get out a post soon with the working setup for everything.