tinymembench v0.4.9 (simple benchmark for memory throughput and latency)
==========================================================================
== Memory bandwidth tests ==
== ==
== Note 1: 1MB = 1000000 bytes ==
== Note 2: Results for 'copy' tests show how many bytes can be ==
== copied per second (adding together read and writen ==
== bytes would have provided twice higher numbers) ==
== Note 3: 2-pass copy means that we are using a small temporary buffer ==
== to first fetch data into it, and only then write it to the ==
== destination (source -> L1 cache, L1 cache -> destination) ==
== Note 4: If sample standard deviation exceeds 0.1%, it is shown in ==
== brackets ==
==========================================================================
C copy backwards : 17589.7 MB/s (1.4%)
C copy backwards (32 byte blocks) : 17436.4 MB/s (1.5%)
C copy backwards (64 byte blocks) : 17101.7 MB/s (3.2%)
C copy : 16904.0 MB/s (1.1%)
C copy prefetched (32 bytes step) : 16901.5 MB/s (3.5%)
C copy prefetched (64 bytes step) : 16876.3 MB/s (1.4%)
C 2-pass copy : 13636.4 MB/s (1.3%)
C 2-pass copy prefetched (32 bytes step) : 12878.5 MB/s (1.5%)
C 2-pass copy prefetched (64 bytes step) : 13203.7 MB/s (1.4%)
C fill : 45018.8 MB/s (2.9%)
C fill (shuffle within 16 byte blocks) : 44908.1 MB/s (3.2%)
C fill (shuffle within 32 byte blocks) : 44505.4 MB/s (2.4%)
C fill (shuffle within 64 byte blocks) : 44634.8 MB/s (1.4%)
---
standard memcpy : 17140.8 MB/s (1.4%)
standard memset : 48397.6 MB/s (3.5%)
---
NEON LDP/STP copy : 18079.4 MB/s (1.1%)
NEON LDP/STP copy pldl2strm (32 bytes step) : 17853.3 MB/s (0.7%)
NEON LDP/STP copy pldl2strm (64 bytes step) : 17916.4 MB/s (5.7%)
NEON LDP/STP copy pldl1keep (32 bytes step) : 17962.5 MB/s (0.3%)
NEON LDP/STP copy pldl1keep (64 bytes step) : 18069.1 MB/s (0.3%)
NEON LD1/ST1 copy : 18185.9 MB/s
NEON STP fill : 48656.8 MB/s (0.4%)
NEON STNP fill : 48825.5 MB/s (0.8%)
ARM LDP/STP copy : 16646.2 MB/s (1.2%)
ARM STP fill : 48761.1 MB/s (0.6%)
ARM STNP fill : 48460.0 MB/s (3.6%)
==========================================================================
== Memory latency test ==
== ==
== Average time is measured for random memory accesses in the buffers ==
== of different sizes. The larger is the buffer, the more significant ==
== are relative contributions of TLB, L1/L2 cache misses and SDRAM ==
== accesses. For extremely large buffer sizes we are expecting to see ==
== page table walk with several requests to SDRAM for almost every ==
== memory access (though 64MiB is not nearly large enough to experience ==
== this effect to its fullest). ==
== ==
== Note 1: All the numbers are representing extra time, which needs to ==
== be added to L1 cache latency. The cycle timings for L1 cache ==
== latency can be usually found in the processor documentation. ==
== Note 2: Dual random read means that we are simultaneously performing ==
== two independent memory accesses at a time. In the case if ==
== the memory subsystem can't handle multiple outstanding ==
== requests, dual random read has the same timings as two ==
== single reads performed one after another. ==
==========================================================================
block size : single random read / dual random read, [MADV_NOHUGEPAGE]
1024 : 0.0 ns / 0.0 ns
2048 : 0.0 ns / 0.0 ns
4096 : 0.0 ns / 0.0 ns
8192 : 0.0 ns / 0.0 ns
16384 : 0.0 ns / 0.0 ns
32768 : 0.0 ns / 0.0 ns
65536 : 0.0 ns / 0.0 ns
131072 : 1.0 ns / 1.4 ns
262144 : 1.5 ns / 1.8 ns
524288 : 2.9 ns / 3.3 ns
1048576 : 5.4 ns / 7.0 ns
2097152 : 11.6 ns / 15.4 ns
4194304 : 16.8 ns / 19.9 ns
8388608 : 35.4 ns / 47.5 ns
16777216 : 81.5 ns / 107.5 ns
33554432 : 110.7 ns / 134.3 ns
67108864 : 127.6 ns / 147.7 ns
block size : single random read / dual random read, [MADV_HUGEPAGE]
1024 : 0.0 ns / 0.0 ns
2048 : 0.0 ns / 0.0 ns
4096 : 0.0 ns / 0.0 ns
8192 : 0.0 ns / 0.0 ns
16384 : 0.0 ns / 0.0 ns
32768 : 0.0 ns / 0.0 ns
65536 : 0.0 ns / 0.0 ns
131072 : 1.0 ns / 1.4 ns
262144 : 1.5 ns / 1.8 ns
524288 : 1.8 ns / 1.9 ns
1048576 : 2.1 ns / 2.1 ns
2097152 : 10.6 ns / 14.3 ns
4194304 : 14.9 ns / 17.8 ns
8388608 : 28.2 ns / 35.1 ns
16777216 : 70.9 ns / 95.0 ns
33554432 : 96.9 ns / 117.2 ns
67108864 : 109.8 ns / 125.5 ns
WDK23
tinymembench v0.4.9 (simple benchmark for memory throughput and latency)
==========================================================================
== Memory bandwidth tests ==
== ==
== Note 1: 1MB = 1000000 bytes ==
== Note 2: Results for 'copy' tests show how many bytes can be ==
== copied per second (adding together read and writen ==
== bytes would have provided twice higher numbers) ==
== Note 3: 2-pass copy means that we are using a small temporary buffer ==
== to first fetch data into it, and only then write it to the ==
== destination (source -> L1 cache, L1 cache -> destination) ==
== Note 4: If sample standard deviation exceeds 0.1%, it is shown in ==
== brackets ==
==========================================================================
C copy backwards : 17996.9 MB/s (7.5%)
C copy backwards (32 byte blocks) : 17911.3 MB/s (11.0%)
C copy backwards (64 byte blocks) : 18090.5 MB/s (1.5%)
C copy : 17971.6 MB/s (0.7%)
C copy prefetched (32 bytes step) : 17881.3 MB/s (1.1%)
C copy prefetched (64 bytes step) : 17913.7 MB/s (13.5%)
C 2-pass copy : 15974.5 MB/s
C 2-pass copy prefetched (32 bytes step) : 14551.7 MB/s (0.2%)
C 2-pass copy prefetched (64 bytes step) : 14668.2 MB/s (0.2%)
C fill : 38719.8 MB/s (0.4%)
C fill (shuffle within 16 byte blocks) : 38620.9 MB/s (0.4%)
C fill (shuffle within 32 byte blocks) : 38712.3 MB/s (0.3%)
C fill (shuffle within 64 byte blocks) : 38733.7 MB/s
---
standard memcpy : 18378.2 MB/s (1.3%)
standard memset : 39135.6 MB/s (0.2%)
---
NEON LDP/STP copy : 18649.8 MB/s (2.5%)
NEON LDP/STP copy pldl2strm (32 bytes step) : 17873.8 MB/s (1.2%)
NEON LDP/STP copy pldl2strm (64 bytes step) : 17904.1 MB/s (1.2%)
NEON LDP/STP copy pldl1keep (32 bytes step) : 17195.5 MB/s (0.8%)
NEON LDP/STP copy pldl1keep (64 bytes step) : 17146.3 MB/s (0.6%)
NEON LD1/ST1 copy : 18663.3 MB/s (1.2%)
NEON STP fill : 39164.1 MB/s (0.3%)
NEON STNP fill : 39110.4 MB/s
ARM LDP/STP copy : 18355.8 MB/s (1.1%)
ARM STP fill : 39194.5 MB/s (0.2%)
ARM STNP fill : 39202.6 MB/s (0.3%)
==========================================================================
== Memory latency test ==
== ==
== Average time is measured for random memory accesses in the buffers ==
== of different sizes. The larger is the buffer, the more significant ==
== are relative contributions of TLB, L1/L2 cache misses and SDRAM ==
== accesses. For extremely large buffer sizes we are expecting to see ==
== page table walk with several requests to SDRAM for almost every ==
== memory access (though 64MiB is not nearly large enough to experience ==
== this effect to its fullest). ==
== ==
== Note 1: All the numbers are representing extra time, which needs to ==
== be added to L1 cache latency. The cycle timings for L1 cache ==
== latency can be usually found in the processor documentation. ==
== Note 2: Dual random read means that we are simultaneously performing ==
== two independent memory accesses at a time. In the case if ==
== the memory subsystem can't handle multiple outstanding ==
== requests, dual random read has the same timings as two ==
== single reads performed one after another. ==
==========================================================================
block size : single random read / dual random read, [MADV_NOHUGEPAGE]
1024 : 0.0 ns / 0.0 ns
2048 : 0.0 ns / 0.0 ns
4096 : 0.0 ns / 0.0 ns
8192 : 0.0 ns / 0.0 ns
16384 : 0.0 ns / 0.0 ns
32768 : 0.0 ns / 0.0 ns
65536 : 0.0 ns / 0.0 ns
131072 : 1.0 ns / 1.4 ns
262144 : 2.4 ns / 3.3 ns
524288 : 3.4 ns / 4.5 ns
1048576 : 3.6 ns / 3.8 ns
2097152 : 9.9 ns / 12.8 ns
4194304 : 12.8 ns / 15.9 ns
8388608 : 19.2 ns / 23.3 ns
16777216 : 50.9 ns / 69.1 ns
33554432 : 84.7 ns / 108.7 ns
67108864 : 104.8 ns / 122.6 ns
block size : single random read / dual random read, [MADV_HUGEPAGE]
1024 : 0.0 ns / 0.0 ns
2048 : 0.0 ns / 0.0 ns
4096 : 0.0 ns / 0.0 ns
8192 : 0.0 ns / 0.0 ns
16384 : 0.0 ns / 0.0 ns
32768 : 0.0 ns / 0.0 ns
65536 : 0.0 ns / 0.0 ns
131072 : 1.0 ns / 1.4 ns
262144 : 1.5 ns / 1.8 ns
524288 : 1.8 ns / 2.0 ns
1048576 : 2.1 ns / 2.1 ns
2097152 : 8.4 ns / 11.3 ns
4194304 : 11.9 ns / 14.3 ns
8388608 : 15.3 ns / 19.3 ns
16777216 : 45.2 ns / 64.1 ns
33554432 : 80.4 ns / 102.5 ns
67108864 : 97.3 ns / 114.3 ns