ROC-RK3399-PC Renegade Elite Developer Boot Guide

Please see the boot detection sequence for the RK3399 SoC.

Rockchip RK3399’s BootROM will enter device mode if it is unable to find a relevant bootloader on external media. In this mode, the SoC accept commands using a custom Rockchip protocol.

The two main VCRs (Vendor Control Requests) are:

  • 0x0471 Transfer to SRAM
  • 0x0472 Transfer to DRAM

When the SoC is powered on, it does not have access to the DRAM so there is only a tiny bit of memory available. It searches for code on storage devices. Once it finds the code it’s looking for, provided that it exists, the SoC will load it into SRAM and run it. Under normal circumstances, this code will initialize DRAM specific to that board’s configuration.

VCR 0x0471 is the USB command equivalent of that. The initialization code is copied over USB to the SoC SRAM, runs to bring up DRAM, and then goes back to BootROM.

Now that DRAM is up, the board would load the secondary loaders. This is well documented by Jonas Karlman.

TPL - 0x40 / 32KiB - 0x31000 / 196KiB Size Max with SPL
SPL - 0x40 / 32KiB - 0x31000 / 196KiB Size Max with TPL
ITB - 0x1c8 / 0x39000 - c7000 / 796 Size Max for FIT

TPL_STACK - 0xff8effff - TPL SRAM Stack Address
TPL_SYS_MALLOC_F_LEN - 0x4000 / 16KiB - TPL Heap Size on Stack

SPL - 0x0 - DRAM
SPL_BSS_START_ADDR - 0x400000 / 4MiB - SPL BSS Address
SPL_BSS_MAX_SIZE - 0x2000 / 8KiB - SPL BSS Max Size
CUSTOM_SYS_INIT_SP_ADDR - 0x300000 / 3MiB - SPL Stack Address
SPL_SYS_MALLOC_F_LEN=0x4000 / 16KiB - SPL Stack Size

SPL_STACK_R_ADDR - 0x4000000 / 64MiB - ITB Load Address
SPL_STACK_R_MALLOC_SIMPLE_LEN - 0x20000 / 128KiB

TFA - 0x40000 / 256KiB
u-boot - TEXT_BASE - 0x200000 / 2MiB

SYS_MALLOC_LEN - 0x8000000 - 128MiB

TEXT_BASE - 0x200000 - 2MiB - start of code, may not be entry point
SYS_LOAD_ADDR - 0x800800 - 8MiB + 2KiB - load address

CUSTOM_SYS_INIT_SP_ADDR - 0x300000 - 3MiB

SPL_MAX_SIZE - 0x2e000 - 184KiB
SPL_STACK - 0x400000 - 4MiB
SPL_PAD_TO - 0x31000 - 196KiB